40-412 PXI Digital I/O Read back Operating SpeedPickering's PXI Digital I/O Module

    Two versions of the 40-412 digital I/O module are offered with very different read back operating speeds.The read back is used to monitor the status of the 32 input connections, each connection is checked to assert whether it's voltage level is higher or lower than two programmable threshold voltages. For the 40-412-001 this is done by a serial acquisition process, for the 40-412-101 this is done by a parallel acquisition process. This results in very different levels of design complexity and different operating speeds.


    Each input is connected to an attenuator that reduces the input voltage level to a more manageable level. A multiplexer (MUX) then chooses one of these voltages to compare to a pair of comparators with independent (programmable) reference voltages. To determine the level of the input signal compared to the reference voltages the user first selects which channel is to be read back, the comparison process is allowed to settle (the delay is part of the driver) and then the value can be read back. The selection of the channel to be read back causes the MUX output to change, capacitive loading means that there is a delay while the voltage settles. The capacitive loading is created mainly by the MUX capacitance itself since a solid state MUX is used.

    If the user needs to read back the status of all 32 inputs a single command can be used to do this, the driver selects each channel in turn and then reads the value, then selects the next channel. This serial process takes time to execute - for many applications the time involved is of little consequence since the devices being driven (such as relay coils) are relatively slow and unchanging.


    For the 40-412-101 a parallel rather than a serial process is used. Each input is connected to a dedicated pair of comparators which indicate if the signal is above or below the two references voltages. All 32 channels (64 values) can be sampled at the same time, the captured data is then read back over the PCI interface from a serial shift register. Since all channels are active at the same time the measurement process is much faster and the absence of a MUX reduces the capacitive loading on the attenuator, giving even a single channel read back a faster settling time. With a typical controller (3GHz Hyper Threading) the 40-412-101 reads all 32 input states back in 48µs, a heavily loaded controller will slow the response, a faster controller will speed up the response.


    As a result of the difference in the acquisition process the 40-412-101 is much faster at reading back input line status, but the design is also more complex and forces the introduction of a second PCB in the module. Consequently the 40-412-101 has a higher cost than the 40-412-001. So the choice is to accept the slower read back time and get the lowest cost per channel of the 40-412-001 or to use the higher acquisition speed of the 40-412-101 and accept the higher cost per channel. The decision may also be influenced by the use of RTOS (40-412-101 significantly reduces controller response times) and whether normal operation requires the capture of the status of all 32 channels, or just one channel at a time.

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