Flexibility of Dual Bus Architecture

    Some of Pickering Interfaces matrices are provided with Dual Bus architectures. They can provide a very flexible solution for applications where the matrix size required and their number vary between target applications, but the user wants to test with just one solution. Rather than trying to design a system with more switching than is required it maybe be better to use the Dual Bus Architecture.

    What is a Dual Bus Matrix?

    A Dual Bus Architecture has two sets of analog buses - Y axis connections into the matrix. In a Dual Bus matrix two sets of isolation relays that connect a sub- matrix of the module or device to the two buses.

    Consider this matrix example, taken from the functional drawing of our LXI model 60-555:
    Dual bus matrix

    The matrix in this example is a two pole matrix (not to be confused with a Dual Bus), each analog bus having 8off 2-pole Y connections (16 wires on each bus). The buses are labelled Bus A and Bus B. The matrix is created from an array of sub matrices each of which is 64x8. These sub matrices are connected to the buses by a bank of isolation relays, one set connecting to each bus (in this example there are 32 isolation relay contacts for each sub matrix since it is 2 pole and Dual Bus).

    Pickering Interfaces offer Dual Bus structures in the Large PXI BRIC matrices as well as in some LXI products.

    Where is the flexibility?

    In this example the matrix could be used as a single 512x8 two pole matrix (a very large matrix!). However the Dual Bus structure gives many other options as well.

    The simplest example is to split the matrix into a dual, which could be identical on size or be two matrices of differing sizes. The sub matrices allow the X axis to be partitioned in 64 way blocks. For example a dual matrix of 256x8 (2 pole) could be created, or a 128x8 and 364x8 (2 pole) pole created.

    A limited functionality 512x16 matrix can be created - the limitation being that the Y connection in the sub matrix cannot be connected to both the analog buses, which in turn places some restrictions on the sub matrix operations.

    Where is the penalty?

    There are additional relays required (more isolation relays) and more connector space is used for the second bus but for a large switching system this often a marginal cost and density penalty.

    More signals have to be routed between the matrices, but this is a design issue rather than a user issue.

    The matrix is however not as simple to manage in software. The automatic isolation relay switching (a process by which isolation relays are automatically switched in response to a request to connect say X1 to X65 in the 60-555 example) provided on other types of matrix in the driver would defeat the aim of providing the flexibility. Users have to set which Y bus the connection is made. This can often require two operations to be made on the switch state, or one operation if the GhostCard driver is used. 

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